| 摘要 |
PURPOSE:To reduce power consumption, by connecting an output terminal of the 1st stage FET in cascade to the source terminal of the FET of the next stage via a resistor and a level shift diode. CONSTITUTION:Sources of GaAs FETs Q85, Q86 are connected in common to a resistor R85, gates are taken as terminals 85, 86, the terminal 85 is used as a clock input and the terminal 86 is used as a reference voltage input. When a clock input terminal at the terminal 85 is smaller than a reference voltage at the terminal 86, the FETQ85 is set off, the FETQ86 is set on and the latch operation is kept. When the clock signal at the terminal 85 is larger than the reference voltage at the terminal 86, the FETQ85 is set on and the FETQ86 is set off. The FETsQ85, Q86 and the FETsQ87, Q88 are connected in cascade and shift diodes Ds1, Ds2 are provided to match the bias level required for the operation with the input level of the next stage and the output level of the pre-stage. |
