| 摘要 |
The system has a microprocessor connected to a number of address lines, data lines, and control lines. A memory unit is connected to the address and data lines and to the control lines to enable storage of data in the memory, and reading of data from, under the control of the microprocessor. The memory unit comprises two RAMs each connected to separate groups of the address lines and separate groups of the data lines. The data may be transferred to and from the two RAMs independently of any common interconnection. In this way the possibility of error conditions that are not detectable is reduced. |
