| 摘要 |
PURPOSE:To perform more controls quickly, by accessing freely a memory, which is connected to a CPU, directly from an external device wihtout setting the CPU to the holding state. CONSTITUTION:A memory map is allocated by an address decoder 8, and an ROM 3 is used as a program area, and an RAM 1 is used as a data area. The data transfer between an input/output port 6 and the RAM 1 is controlled by an I/O data buffer 9. Addressing of the RAM 1 due to an address counter 7 is controlled by an I/O address buffer 10. A bus control circuit 11 is connected to a CPU 2 through a control bus. The bus control circuit 11 controls buffers 4, 5, 9 and 10 to make it possible to access the RAM 1 from the input/output port 6 at the timing of a machine cycle M1 and to access the RAM 1 from the CPU 2 at other timings. |
