| 摘要 |
PURPOSE:To facilitate the generation of an address which depends on parameters of both inside and outside loops, by initializing the bias value of an index register when the process of a double loop constitution proceeds to the inside loop. CONSTITUTION:An address qualifying circuit consists of an instruction designating address latch 2, selecting circuit 3, 5, 6 and 8, and adder circuit 4, an index register IX7, and an index save register 9. An address S1 for designation of instruction is delivered directly to an address bus, and the address can be directly designated by an instruction. At the same time, an address S5 for deisngation of instruction is loaded to the register IX7 in the form of the initial value. Furthermore the address value obtained by adding the address value S1 to the contents value S4 of the register IX7 can be delivered to an address bus by means of an index qualifying output. |
