| 摘要 |
PURPOSE:To unify a logical operation to a current mode and to speed up a full adder using multilevel logic, by accumulating logical circuits vertically. CONSTITUTION:The 1st voltage comparator consisting of transistors (TRs) T8-T11, the 2nd voltage comparator consisting of TRs T6, T12 and the 3rd voltage comparator consisting of TRs T7, T13 are directly connected in the current mode. Consequently the logical operation is executed in the current mode, so that an added output S can be obtained from a point to which the collectors of the TRs T12, T13 are connected and a shifted output C0 can be obtained from the collector of the TR T11. |
