| 摘要 |
PURPOSE:To improve the use effect of a data control circuit and to facilitate large-scale integration by controlling a connection between the common data input/output terminal of a data control circuit and a memory bank, etc., through a selecting circuit. CONSTITUTION:When an address and a write/read command are applied from a CPU through a control part 4, data control circuits 1-1 and 1-2 equipped with memory banks 2-1, 2-2..., an error correcting and error check bit generating circuit, etc., are specified selectively. Through the selecting circuit 3, connections between the common input/output terminal for the banks 2-1... of the specified circuits 1-1 and 1-2 and for data transfer to the CPU, and a data line 3000 from the banks 2-1... or CPU is controlled. This system wherein the memory banks are not handles for individual memory banks improves the use effect of the data control circuits of the storage device available for interleaving and the number of pins is decreased because of the use of the common output/input terminal to facilitate the large-scale integration of the data control circuits. |
