| 摘要 |
PURPOSE:To improve a processing speed, by determining the next execution address of the 2nd control storage device from the logical operation of a filed of a part of an instruction read out from the 1st contron storage device and a filed of a part of an instruction read out from the 2nd control storage device. CONSTITUTION:A head address is read out from a control storage device 3 is read out with an instruction code OP and a part of the output is inputted to a branch condition selecting circuit 6. Further, a BM field 13 is provided as an operation control field of the bit location to the selected branch conditions at a part of a filed of the microinstruction being an output of a control storage device 4 and the output of the field 13 is inputted to the circuit 6. This field 13 is used as a control bit making effective/ineffective the output bit of a table depending on the classification. Thus, the result obtained from the logical operation of the field read out from the device 4 is taken as the branch condition and the next executing address of the device 4 is determined. |
