发明名称 ADDRESS COMPARISON CIRCUIT
摘要 PURPOSE:To improve the processing speed at a pipeline processing, by detecting whether or not a data to be taken in advance is ineffective, when the data to be taken in advance exists over the boundary of the address. CONSTITUTION:In a storage device 40, double words DWA, DWB, DWC to be taken in advance include data exceeding the boundary as shown in codes 41, 42, 43, 44 to address boundaries MA-1, MA, MA+1 of the double words. A selector (SEL) selecting constants (-1), (0), (+1) outputs (-1) for the code 41 and (+1) for the code 44. In outputting (-1) from this SEL, the address register represents the address of the double word DWB, the output of the addition circuit represents the address of the DWA to detect whether or not new data are written into either one of two areas of the DWA, DWB. In outputting (+1) from the SEL, whether or not the new data is written in either of the DWB or the DWC is detected.
申请公布号 JPS58142448(A) 申请公布日期 1983.08.24
申请号 JP19820025203 申请日期 1982.02.18
申请人 MITSUBISHI DENKI KK 发明人 TAGUCHI YASUSHI
分类号 G06F9/38;(IPC1-7):06F9/38 主分类号 G06F9/38
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