发明名称 INTERRUPTION CONTROL SYSTEM
摘要 PURPOSE:To prevent the waste of useless processing time and to attain high efficiency of an information processor, by saving the information only to a program requiring the saving of information in response to an interrupted program. CONSTITUTION:The information processor consists of a CPU1 and a main storage device 2, and the CPU1 is provided with a control section 10, a program counter 11, a register file 12 and a save address pointer 13. The storage device 2 is provided with the information relating to the cause to interruption, a specific area 20 storing the content of the counter 11, and a save area 21 saving and storing the contents of the file 12 and the counter 11. The pointer 13 is provided a program control block to the program and when an interruption takes place, the CPU1 determines whether or not the contents of the file 12 and the counter 11 are saved to the area 21. Thus, useless processing time is prevented and the high efficiency of the device is attained.
申请公布号 JPS58142451(A) 申请公布日期 1983.08.24
申请号 JP19820025418 申请日期 1982.02.18
申请人 NIPPON DENKI KK 发明人 YOSHITAKE MASAAKI
分类号 G06F9/46;G06F9/48 主分类号 G06F9/46
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