发明名称 DUAL GATE MOS-FET
摘要 PURPOSE:To reduce case capacitance by extending a shield segment part between the gate and the inner end of lead of source mutually adjacent to the chip mounting area. CONSTITUTION:The leads 5 of gate G1 and gate G2 are provided on the line extending from the leads 1, 4 of source and drain, while the internal end is extended in the vicinity of chip mounting part 2 in the resin package 7. The internal end of each lead is connected 6 with the chip 3. A pair of shield segments 8 are projected from the chip mounting portion 2 and respectively extending between the internal ends of two gate leads 5 and between the internal ends of gate lead 5 and drain lead. In this structure, shielding is realized due to existence of projected segment 8, case capacitance is reduced, and thereby a high frequency dual gate MOSFET having a small amount of feedback to the input side from the output side can be obtained.
申请公布号 JPS58142576(A) 申请公布日期 1983.08.24
申请号 JP19820024402 申请日期 1982.02.19
申请人 HITACHI SEISAKUSHO KK 发明人 HOTSUTA KIYOMICHI;MASUDA AKIRA
分类号 H01L21/331;H01L29/73;H01L29/78 主分类号 H01L21/331
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