| 摘要 |
PURPOSE:To improve the reliability of amplitude detection, by reducing the discharge time constant of a threshold generating circuit to enhance the following-up efficiency when an address is switched to change rapidly the amplitude of a read signal. CONSTITUTION:Read signals a1 and a2 are amplified by a differential amplifier 1 and are subjected to full wave rectification in transistors (TR) 10 and 11 and are smoothed by a circuit consisting of a capacitor 15 and a resistor 14. A rectified voltage (C) is subjected to impedance conversion and level shift in a buffer circuit 18 to become a waveform (f) of a threshold voltage. A rectified voltage (d) becomes a waveform (g) similarly to the rectified voltage (C) by a buffer circuit 19, and the amplitude value of read signals is converted to a potential difference between waveforms (f) and (g). In this circuit, a signal (k) which turns on an FET TR17 for a certain time is impressed to the gate of the TR17 synchronously with the timing of address switching, thereby reducing the discharge time constant of this section to enhance the following-up characteristics of the threshold voltage (f). |
