| 摘要 |
<p>A redundant semiconductor memory device to compensate for any faulty column of bit cells in a byte-wide semiconductor memory array. The device (10) is arranged in columns of bit cells (14) addressable in bit segments (12) with a plurality of separate, redundant, columns of bit cells, each separate column being capable of electronic placement at any column position within any bit segment of the memory. Specifically, multiplexing devices (40) are provided at the output buffers (16) of a memory for multiplexing conventional bit segment with spare columns of bit cells (28 and 30), wherein the spare columns are only activated, that is, selected, when a particular column in the conventional bit segment has been identified to be defective.</p> |
