发明名称 FRAME SYNCHRONISM PROTECTING CIRCUIT
摘要 <p>PURPOSE:To obtain an economical frame synchronism protecting circuit using a digital circuit, by protecting the frame synchronism with lock-in in case coincidence/discordance pulses are produced more than the threshold level within a prescribed frame period. CONSTITUTION:A control circuit 7 sends a signal to a coincidence/discordance circuit 1 and then transmits a coincidence pulse when the coincidence is obtained between the circuit data fed through a terminal 9 and a frame synchronous pattern supplied from a synchronous pattern generating circuit 2. Then the coincidence pulses at the specific position of each frame are counted by a counting circuit 3 which is reset with an 8-frame period. When the count value of the circuit 3 exceeds the threshold level given from a threshold level generating circuit 5, an output of comparison is delivered. Receiving this output, the circuit 7 decides that the lock-in is over and then feeds signals to the circuits 1 and 5. Then the discordance pulse is generated from the circuit 1. When the count value of the circuit 3 exceeds the threshold level of the circuit 5, the generation of step out is decided. Then coincidence pulses are transmitted from the circuits 1 and 5.</p>
申请公布号 JPS58139540(A) 申请公布日期 1983.08.18
申请号 JP19820022353 申请日期 1982.02.15
申请人 FUJITSU KK;NIPPON DENSHIN DENWA KOSHA;OKI DENKI KOGYO KK;NIPPON DENKI KK;HITACHI SEISAKUSHO KK 发明人 KITAMURA NOBUAKI;IWASE YASUMASA;SHIRAISHI YOSHIKATSU;TAKEUCHI WATARU;MORI MAKOTO
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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