发明名称 DELAY TIME CORRECTING METHOD OF PARALLEL DATA TRANSMITTER
摘要 PURPOSE:To attain correction easily in a short time, by adjusting each delay element so as to illuminate the 1st and the 2nd light emitting element at the same time and correcting the delay time of each line so as to be made coincident with each other. CONSTITUTION:The rear stage of a delay element 4a of a reception section of a receiver is provided with the light emitting element 7a, the rear stage of flip- flops 5b1-5bn is provided with light emitting elements 7b1-7bn, the element 7a is illuminated with the output of a clock pulse, and the elements 7b1-7bn are illuminated with signal outputs 8b'1'-8b'n' from the flip-flops 5b1-5bn when consecutive pulses 8b1-8bn having narrow pulse width synchronized with the leading (also trailing) of a clock pulse input 1a are inputted to data input terminals 2b1- 2bn respectively. Thus, delay elements 4b1-4bn are adjusted so as to illuminate the elements 7a and 7b1-7bn at the same time, allowing to correct the delay time on transmission lines 3a, 3b1-3bn so as to make it coincident with each other.
申请公布号 JPS58138149(A) 申请公布日期 1983.08.16
申请号 JP19820020282 申请日期 1982.02.10
申请人 HITACHI DENSEN KK 发明人 AOKI TERUAKI;IMAI MITSUO
分类号 H04L25/02;H04L5/20 主分类号 H04L25/02
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