| 摘要 |
PURPOSE:To enable a skip of an optional step and to accelerate the processing speed of information, by replacing the contents of each buffer register corresponding to each memory bank in response to the normal and skip operations. CONSTITUTION:Memory banks 1 and 1' are divided into plural parts respectively in response to the number of steps to be skipped. Each of these divided banks has a block constitution containing read address counters 2 and 2' and buffer registers 3 and 3'. Thus an alternating access and a simultaneous access are posible for each bank. In a noraml state the accesses are given alternately to the banks; while a simultaneous access is given to the banks in case the skipping the carried out at a specific block. At the same time, the output is fixed at only the specific block to enable skips in response to the number of banks. |
