| 摘要 |
A detector circuit (10) is programmed to produce an output signal when an input signal is at a predetermined frequency. The input signal is provided to an inverter (14) to produce an inverse signal. The input signal together with the inverse signal are provided to two switches (16, 18). The switches (16, 18) are driven by first and second drive signals produced by a drive generator (60). The output terminals (24, 28) of the switches are alternately connected to the input terminals in synchronism with the corresponding drive signals. The output signals from the switches (16, 18) are transmitted through low pass filters (26, 30) and the resulting signals are combined to produce a summation signal by a summation circuit (36). The summation signal is passed through an absolute value circuit (40) to produce an absolute value signal. The absolute value signal is examined by a threshold detector circuit (44) which produces an output when the absolute value signal exceeds a preset threshold. An oscillator (52) provides a reference signal to a programmable divider ( 56) that produces a selected rate signal for the drive generator (60). The programmable divider (56) is set such that the selected rate signal produced thereby corresponds to the frequency of the input signal to be detected. A phase and frequency error detector circuit (60) is provided to form a feedback loop to monitor the output of the switches (16, 18) and drive the programmable divider (56) to produce a selected rate frequency signal which corresponds to the frequency of the input signal. |
