| 摘要 |
PURPOSE:To assure the detection of an error, by applying the same input signal to the 2nd IC having the same constitution as the 1st IC connected to a data bus, and supplying the output of the 2nd IC directly to a check bit for comparison. CONSTITUTION:The same signal 5 is supplied to the 2nd IC3 having the same constitution as the 1st IC2 which is connected to a data bus 1 via a data bus interface. The output of the IC2 is stored in a memory 61; while the output of the IC3 is stored in a memory 62 via a parity growing circuit 4. The data of the memory 61 is compared with the data of the memory 62 through a check circuit 7. The data of the memories 61 and 62 have routes which are different completely from each other. As a result, an error arising at any part can be assuredly detected. |
