| 摘要 |
PURPOSE:To make a sampling timing, which is required in digital signal demodulation, most suitable automatically in accordance with the change of a transmission line, by changing the control voltage of a voltage control oscillator to control the phase of sampling clocks. CONSTITUTION:In an error detector 6, the difference between a sample value in a discriminating circuit 1 and its discrimination value is detected by a subtractor 60, and the absolute value is obtained by a folding rectifying circuit 61. A perturbation signal generated in an oscillator 51 and the output signal of an integrator 53 are added by an adder 52. A correlator 50 is provided for obtaining the correlation value between the output of the oscillator 51 and the output of the detector 6 and consists of a multiplier 500 and an integrator 501 and outputs the output to the integrator 53. The output of the adder 52 becomes the control signal of a voltage control oscillator for the purpose of controlling the phase of sampling clocks of a clock extracting circuit 3. The control is performed by the output of the circuit 3 to obtain the most suitable sampling timing in the circuit 1. |
