| 摘要 |
PURPOSE:To decrease internal parasitic resistance at the time of a operation, when a semiconductor layer having desired concentration of impurities is formed on a semiconductor supporting substrate having higher concentration than that of said layer and the element region is formed in the layer, by making thin the thickness of the semiconductor layer other than an element forming region. CONSTITUTION:An N<-> type semiconductor element layer 12 is epitaxially grown on the N<+> type semiconductor supporting substrate 11. N type impurities are selectively introduced in a specified part 13 of the layer 12 by a diffusion method or an ion implantation method, and the impurity concentration at this part is increased. Thus the impurity introduced part 13 is incorporated with the substrate 11 to form a unitary body. Concave parts 14 are formed in the surface of the substrate 11 so as to surround the introduced part 13. Then on the entire surface including the concave parts, an N<-> type layer 15 is epitaxially grown. Concave and convex parts are formed in an interface 17 between the substrate 11 and the layer 15, and the thick parts and thin parts are formed in the layer 15. A specified vertical MOSFET is provided in accordance with an ordinary method in the surface layer of the thick part of the layer 15. Thus the length of a main current path is shortened by the height of the concave part, and the parasitic resistance is decreased by that amount. |
