发明名称 PHASE LOCK DETECTING CIRCUIT
摘要 PURPOSE:To perform phase lock detection securely by adding a function for frequency decision as well as level decision. CONSTITUTION:A digital comparator 32 performs a digital comparison between a frequency at a modulation terminal 7 and the frequency of the output signal of an AC amplifier 31 which is counted by a counter to generate an H-level output only when the both coincide with each other, or an L-level output when not. An AND circuit 36 has a level H only when the control voltage of a voltage-controlled oscillator VCO7' contains no AC component and a DC component within some level range. An OR circuit 37 has a level H when either of the comparator 32 and circuit 36 generates the H-level output. Therefore, only when the modulator is locked, an H-level signal appears at a terminal 38, so this signal is utilized to obtain a lock signal easily.
申请公布号 JPS58129835(A) 申请公布日期 1983.08.03
申请号 JP19820010707 申请日期 1982.01.26
申请人 MATSUSHITA DENKI SANGYO KK 发明人 MAKIMOTO MITSUO;ENDOU HARUYOSHI;SAITOU MITSUO;YAMASHITA SADAHIKO
分类号 H03L7/095;H03L7/08 主分类号 H03L7/095
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