发明名称 SUPERCONDUCTIVE LOGICAL CIRCUIT
摘要 PURPOSE:To increase opeation tolerance by connecting the series circuit of a resistance and a Josephson junction in parallel to a Josephson junction constituting a series circuit together with a resistance. CONSTITUTION:The series circuit SC of a resistance RC and a Josephson junction JC is connected in parallel to the Josephson junction JA of a series circuit SA. Further, inequalities 22 and 30 are required to hold simultaneously for the current value IA of an input current IA and the current value IR of an input current IB. In addition, inequalities 31 and 32 need hold simultaneously so that only when the input current IB is supplied to an input terminal TV, neither Josephson junction has transistion from a superconductive state to a voltage- applied state. Furthermore, inequalities 33 and 34 are required to hold simultaneously so that when the Josephson junction JC has transition from a superconductive state to a voltage-applied state, the Josephson junction JC has no transition from a superconductive state to a voltage-appied state. Consequently, the possible range of the current value IA is equal to or greater than that of the IB.
申请公布号 JPS58129832(A) 申请公布日期 1983.08.03
申请号 JP19820010730 申请日期 1982.01.26
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 NITSUTA JIYUNSAKU;TAKARAGAWA KOUJI;ISHIDA AKIRA
分类号 H03K19/195 主分类号 H03K19/195
代理机构 代理人
主权项
地址