| 摘要 |
PURPOSE:To make many apparatus controllable with small number of output signal lines by outputting timing control signals to a processing apparatus and outputting the codes for controlling latch means from a CPU according to programs and state signals. CONSTITUTION:Sequence control is accomplished by the programs of a read-only memory and a CPU, and the read-only memory which stores the operation sequence programs of the processing apparatus and the CPU are provided. Another latch means 22 for outputting timing control signals to the processing apparatus and further outputting latch signals to the processing apparatus according to the programs and the state signals are provided. The codes for controlling the means 22 are outputted from the CPU. Thus, many apparatus are controlled with a small number of output signal lines. |
