| 摘要 |
PURPOSE:To reduce the capacity of a buffer memory in a channel common controlling circuit by blocking the buffer memory and enabling each channel to use each block memory optionally. CONSTITUTION:A data channel device 20 consists of n channels 5-1-5-n, the buffer memory 2, a common control part 3, and a buffer memory block specifying part 4. An I/O starting signal is applied from a central processing unit (CPU) to the common control part 3 through a connection line 11. The common control part 3 sends a signal to request an idle memory block to the buffer memory block specifying part 4 through connection line 22. When receiving the address of the idle memory block through a connection line 21, the common control part 3 sends the address to the buffer memory 2 through a connection line 15, so that the idle memory block in the buffer memory 2 corresponding to the address is formed in a channel specified by the CPU. |
