发明名称 ENCODER
摘要 <p>PURPOSE:To simplify the device, by reading a buffer memory at the transmission side with a transmission line clock. CONSTITUTION:A picture signal inputted from a picture input terminal 1 is A/D- converted at an A/D conversion circuit 3 and an encoding circuit 4 for A/D conversion and encoding, and written in a buffer memory 5. The content of the buffer memory 5 is read out at an output of a transmission clock generating circuit 8, and an output data of a synchronizing information generating circuit 12 is in time division multilex at a synchronizing information multiplex circuit 11 and transmitted to a digital transmission line 13. The data inputted via a data input terminal 14 is picked up at synchronizing information at a synchronizing information pickup circuit 15 and written in a buffer memory 16. The content of the memory 16 is read out in the decoding speed, decoded at a decoding circuit 17, converted at a D/A conversion circuit 18 and outputted to a picture output terminal 19.</p>
申请公布号 JPS58127470(A) 申请公布日期 1983.07.29
申请号 JP19820009839 申请日期 1982.01.25
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 KURODA HIDEO;TAKEGAWA NAOKI
分类号 H04N1/21;H04N1/41;H04N1/413;H04N19/50 主分类号 H04N1/21
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