发明名称 DIGITAL OUTPUT CONTROLLER
摘要 PURPOSE:To evade the repetitive output of the same significant output data by rewriting all bits of mask data into a masked state. CONSTITUTION:A process data input/output (PIO) controller 20 is provided with gates (G) 201-203. The gate G201 is a receiver gate connected to an input/ output bus 14 and the G203 is a driver gate connected to the data bus of a PIO bus 16. Data received by the G202 is held in a data register DR204 and an address received by the G202 is held in an address register AR205. Inherent data for specifying all data as insignificant data is held previously in a mask data register MR206.
申请公布号 JPS58125104(A) 申请公布日期 1983.07.26
申请号 JP19820007133 申请日期 1982.01.20
申请人 TOKYO SHIBAURA DENKI KK 发明人 OOTANI AKIO
分类号 G05B15/02;G06F9/48 主分类号 G05B15/02
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