发明名称 PARALLEL BUS CONTROLLER
摘要 <p>PURPOSE:To detach an optional equipment from a circuit without causing disturbance to other parts by forming a by-pass of logical circuits at a daisy where plural equipments are connected in parallel and in a daisy shape through plural common buses. CONSTITUTION:Plural controllers 2 are connected to the common buses (a)-(d) by a connector 3. The buses (a)-(c) are connected in parallel and the bus (d) is connected in the daisy shape. On the daisy bus (d), a shown signal is intercepted because one terminal of an AND circuit 7 is grounded, and modified by the controller 2 and inputted to an AND circuit 8 through a bus (e). When the output of an inverter 10 has a level 1 connected to the other terminal of the AND circuit 8, the AND circuit 8 turns on to send it output as a down signal from an OR circuit 9 through the bus (d). When the connector 3 is detached, both inputs to the gate circuit 7 go up to the level 1 and the signal on the bus (d) is transmitted as it is through the OR circuit 9 as a down signal. Then, the gate circuit 8 has a 0-level input. Thus, an optional equipment is detachable.</p>
申请公布号 JPS58125124(A) 申请公布日期 1983.07.26
申请号 JP19820007916 申请日期 1982.01.21
申请人 MITSUBISHI DENKI KK 发明人 MOROTOMI HISASHI
分类号 G06F1/18;G06F3/00;G06F13/37 主分类号 G06F1/18
代理机构 代理人
主权项
地址