| 摘要 |
PURPOSE:To obtain a signal clamped to a value being set digitally, by controlling a clamp level of a clamp circuit in response to the output signal level of an A/D converter. CONSTITUTION:A digital comparison result ''0'' or ''1'' from a digital level comparator 4 and a clamp timing pulse S4 are applied to a gate 6, the comparison result ''0'' or ''1'' is applied to a switch SW in the timing of the pulse S4 to control the turning on/off of the SW. When the switch SW is turned on, a capacitor C1 is charged and when the switch SW is turned off, the capacitor C1 is discharged. Thus, the analog clamp level of the input to an amplifier 5 is changed. |
