| 摘要 |
<p>PURPOSE:To reduce the area of a chip by reducing the area required for power source supplying wirings for an output buffer circuit containing the output buffer circuit. CONSTITUTION:A series of an output buffer circuit system (from 12 to 12' in the drawing) having the same voltage power source terminal connected to output buffer circuits 12, 12', 13, 13', and hence GND 1-terminals 1, 2 and Vcc terminals 3, 4 and connected to one of the same potential power source (designated by Vcc 1-terminal 4 and GND 1-terminal 2) connected to thereto is not connected via the internal wirings in a series of an output buffer connected to the other power source terminal (Vcc terminal 4, a GND terminal 2) and a series of the output buffer connected thereto (from 13 to 13' in the drawing) and a chip. Further, in order to avoid power source noise which is produced when the output buffer circuits 12, 12', 13, 13' switch ON or OFF to affect the influence of the other circuit and particularly in the internal logic circuit, the Vcc 1-terminals 3, 4 and the GND 1-terminals 1, 2 for the output buffer circuit are not connected with the GND 2-terminals 5, 6, 7, 8 and Vcc 2-terminals 9, 10 connected mainly to the internal logic circuit in the chip.</p> |
