Protective circuit for semiconductor devices.

摘要

An input pad overvoltage protective circuit for integrated devices is disclosed. It enables both positive and negative polarity input signals be applied to a protected gate (14) of an FET (11). The protective circuit comprises a first resistor (12) coupled between an input pad (13) and the gate (14) and a current limiting second resistor (15) and diode (16) coupled between the pad and a reference potential.