发明名称 MULTIPLE PULSE-WIDTH MULTIPLIER
摘要 <p>For forming ? bi. ci, in a pulse width multiplier, two input voltages bi are summed at the input of an inverter and are added, after each passes through a separate switch and proportional stage, at the input of a smoothing stage, to the inverter output signal. The switches are actuated by switching pulses which are width-modulated in accordance with the factors ci. The calculated sum is present at the output of the smoothing stage. Great accuracy in field-oriented control of rotating-field machines is possible when vector analyzers and vector rotators designed in this manner are used.</p>
申请公布号 CA1150368(A) 申请公布日期 1983.07.19
申请号 CA19800352010 申请日期 1980.05.15
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 BLASCHKE, FELIX
分类号 G06G7/161;G06G7/22;H02P21/06;(IPC1-7):H03K5/04 主分类号 G06G7/161
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