DIGITAL-TO-ANALOG CONVERTER WITH IMPROVED COMPENSATION ARRANGEMENT FOR OFFSET VOLTAGE VARIATIONS

摘要

DIGITAL-TO-ANALOG CONVERTER WITH IMPROVED COMPENSATION ARRANGEMENT FOR OFFSET VOLTAGE VARIATIONS Inventor: Adrian Paul Brokaw A digital-to-analog converter comprising a plurality of identical transistor current sources with their emitters connected to respective shunt legs of an R-2R ladder network for establishing binary weighting of the transistor currents. The effects of variations in transistor offset voltage are compensated for by returning the ladder termination resistor to a voltage which is 2(kT/q)ln 2 more positive than the last active stage of the converter.