发明名称 VERTICAL SYNCHRONIZING SEPARATION CIRCUIT
摘要 PURPOSE:To attain optimum slice level to ghost at separation and to obtain stable vertical synchronizing signals, by performing the amplitude separation of a composite synchronizing signal after the composite video signal having stable pedestal level to the video signal change. CONSTITUTION:A pedestal level from a composite video signal input terminal 1 is clamped to a constant level at a clamp circuit 2, and the output of the circuit 2 is branched into two; one is applied to the 1st LPF13 of a clamp pulse generating circuit 12. The LPF13 separates the vertical synchronizing signal component, the peak value of the synchronizing signal is detected at a peak value detection circuit 14, the slice level is set at the 1st comparator 20, the output of a monostable multivibrator 21 is applied to the circuit 2 as a clamp pulse to close a switch 5 to attain the coincidence between the pedestal level and a reference voltage V1. When the pedestal level is made stable, the vertical synchronizing signal is outputted via the 2nd and 3rd comparators 22, 24 and the 2nd LPF23.
申请公布号 JPS58120376(A) 申请公布日期 1983.07.18
申请号 JP19820003688 申请日期 1982.01.13
申请人 TOKYO SHIBAURA DENKI KK;NIPPON HOSO KYOKAI 发明人 KAWAI KIYOYUKI;OBARA MASAHARU
分类号 H04N5/10;H04N5/08;(IPC1-7):04N5/08 主分类号 H04N5/10
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