| 摘要 |
A non-volatile dynamic semiconductor memory cell comprises a one device dynamic volatile memory circuit associated with bit line (BL) and having a switching device (FET 14) and a storage capacitor (Cs); and a non-volatile floating gate device disposed between the storage node (10) and the switching device. The non-volatile floating gate device has a floating gate (FG), a floating gate FET (3), a control gate (P) and a voltage divider (16) having first and second serially-connected capacitors (C1, C2), with the floating gate being disposed at the common point between the first and second capacitors. One of the capacitors (C1) includes a dual charge or electron injector structure and the capacitance of this capacitor has a value substantially less than that of the other capacitor (C2). |
