发明名称 SIMPLE SAMPLING DATA RATIO CONVERTER
摘要 PURPOSE:To change the sampling frequency simply after decoding, by writing a picture element sampled at a fequency four times the subcarrier way frequency after interleaving the element in the ratio in a memory and reading out the element with a few pulses at the readout of the memory. CONSTITUTION:The 1st clock generator 11 is locked by receiving an input synchronizing signal (SYNC) and an input subcarrier way signal (SC) and generates a reference clock dividing one horizontal synchronizing period being four times that of the SC into 910. The reference clock (910 clocks/1H) is interleft with a signal 4 at a write address counter 13 and the write to a memory 18 is done in a few frequencies. The signal 4 is generated when the output of a counter 12 counting the reference clock and the register 13 is coincident. The data read in the memory 18 is read out with a pulse (858 clocks/1H) from a readout counter, resulting that a signal changed with the sampling rate is obtained.
申请公布号 JPS58117785(A) 申请公布日期 1983.07.13
申请号 JP19810214394 申请日期 1981.12.31
申请人 NIPPON DENKI KK 发明人 EMORI TAKEO
分类号 H04N7/12;(IPC1-7):04N7/12 主分类号 H04N7/12
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