发明名称 FREQUENCY DIVIDER
摘要 PURPOSE:To obtain (m+1) kinds of output pulses having different duty ratios, by overlapping pulses of each digit of a(2<m>+1) notation counter connecting binary counters in cascade on the time axis. CONSTITUTION:An input pulse, Tsec in period and d% in duty ratio is supplied to an input terminal IN. In the pulses Q1-Qm+1 of each digit of the (2<m>+1) notation counter connecting the binary counters in cascade, the pulse Qm+1 is given to an output OUTm+1 directly, the pulse Qm is given to an output OUTm after being ORed with the Qm+1, the pulse Qm-1 is given to an output OUTm-1 after being ANDed with the Qm and ORed with the Qm+1, and similarly at an output OUT1, the result of the logical product of the pulses Q1-Qm ORed with the pulse Qm+1 is obtained. Each pulse output OUTi(i=1-m+1) has the same period, (2<m>+1)T but different duty ratios.
申请公布号 JPS58117732(A) 申请公布日期 1983.07.13
申请号 JP19810210710 申请日期 1981.12.30
申请人 FUJITSU KK 发明人 ANDOU MASAYUKI;UCHIDA YUKIO;ISHII TADAO
分类号 H03K23/00;H03K5/15;H03K23/64 主分类号 H03K23/00
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