发明名称 |
Memory cell arrangement for a static memory |
摘要 |
A memory cell for a static memory, in which the number of control lines is reduced to a maximum of three by the use of a diode in one collector circuit and the series connection of a diode and a resistor in the other collector circuit of an Eccles-Jordan flip-flop, which diodes have an exponential characteristic with an exponent smaller than that of conventional diodes.
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申请公布号 |
US4393471(A) |
申请公布日期 |
1983.07.12 |
申请号 |
US19800205816 |
申请日期 |
1980.11.10 |
申请人 |
U.S. PHILIPS CORPORATION |
发明人 |
HART, CORNELIS M.;LOHSTROH, JAN |
分类号 |
G11C11/411;H01L27/102;H03K3/286;(IPC1-7):G11C11/40 |
主分类号 |
G11C11/411 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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