发明名称 DECODING CIRCUIT
摘要 PURPOSE:To decode BnZS code into NRZ code, by adding the constitution only with a simple shift register and a detection circuit. CONSTITUTION:The BnZS code is converted into the positive NRZ signal (a) and the negative NRZ signal (b) at a bipolar/unipolar conversion circuit 1 and they are applied to a shift register 4 as the NRZ signal (c). When no consecutive ''0'' exists in the original NRZ code and only a pulse B in accordance with the bipolar rule is inputted, no error detection signal (i) is outputted and the decoded NRZ signal (h) is outputted from the shift register 4. When the B8ZS code shown in Fig. (b) is inputted and ''BOOVBOOV'' is set to the register 4, a register 5 has the content as shown in Figure by detecting a bipolar violation pulse V at a check circuit 3. A detection circuit 6 makes a detection signal (e) to ''1'' when the content of the register 4 is ''10011001'' and a detection circuit 7 makes a detection signal (f) to ''1'' when the content of the register 5 is ''10001000''. An output signal (g) of an AND circuit 8 becomes a clear signal for the registers 4, 5.
申请公布号 JPS58115961(A) 申请公布日期 1983.07.09
申请号 JP19810212139 申请日期 1981.12.29
申请人 FUJITSU KK 发明人 KUTSUWADA NORIYUKI;MOTOI HIDESUKE
分类号 H03M5/04;H03M5/14;H04L25/49 主分类号 H03M5/04
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