发明名称 TIME SLOT EXCHANGING SYSTEM
摘要 PURPOSE:To prevent time slot from crosstalk, by providing series two-stage data buffer memories for the flow of digital signals, and accommodating a frame discriminating bit at the pre-stage, to reserve the time slot. CONSTITUTION:Series two-stage (DBM1, DBM2) of data buffer memories DBM are provided for the flow of multiplex signals. A frame discrimination bit (FB) is provided for the data buffer memory DBM1 to compare the FB at readout with that written at present. When they are coincident, the readout signal is written in the DBM2 and a signal transmitted to a demultiplexer DMPX is assumed as a signal before one frame written in the DBM2. Thus, the time slot storage in the frame is reserved even after exchanging.
申请公布号 JPS58114548(A) 申请公布日期 1983.07.07
申请号 JP19810214004 申请日期 1981.12.26
申请人 FUJITSU KK 发明人 ABE MASATOSHI
分类号 H04Q11/04 主分类号 H04Q11/04
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