发明名称 CAPACITANCE VOLTAGE DIVIDING CIRCUIT
摘要 PURPOSE:To improve the resolution without being affected with the error of element, by splitting a capacitance of weighting corresponding to high-order bits into plural capacitances to prevent the monotonous increase from being lost due by the error in weighted capacitance. CONSTITUTION:A voltage between the 1st and 2nd voltages V1, V2 is divided with the capacitance to obtain an output voltage V0. Changeover switches SW1- SW9 connect one end of weighted capacitors C0-8C0 and 16C0 (1)-(3) to the V1 or V2 in response to the input digital signal. A transistor TD charges up each capacitance to a prescribed potential prior to the voltage division and is turned on for a short time with a clock CLK. A gate circuit having an OR gate OG1 and an AND gate AG1 is used to control the switches SW6-SW9.
申请公布号 JPS58114527(A) 申请公布日期 1983.07.07
申请号 JP19810209782 申请日期 1981.12.28
申请人 FUJITSU KK 发明人 FUJII SHIGERU
分类号 H03M1/74;H03M1/80;(IPC1-7):03K13/05 主分类号 H03M1/74
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