发明名称 TOTAL ADDER
摘要 PURPOSE:To constitute a simple circuit whose number of elements is small, by forming an input/output signal by a current input and a current output, converting an input current of ternary to voltage of quarternary comparing it with each reference voltage, and switching it. CONSTITUTION:3 current inputs X, Y and Ci of the same value are supplied to a resistance R5 and are converted to voltage, and 4 voltage signals 0-3 are formed in a terminal (a). This voltage is applied to one base of a differential switch constituted of transistors TRQ20 and Q21, Q22 and Q23, Q24 and Q25, and Q26 and Q27. To the other base, intermediate values V1-V3 of the signals 0-3. When all input signals are off, voltage of the terminal (a) goes to ''0'', TRs Q21, Q23, Q25 and Q27 turn off, other TRs turn on, and both a sum signal S and a carry signal C0 are not outputted. When one of the input signals is turned on, the TRs Q20, Q22, Q24 and Q27 are turned on, others turn off, the signal S is outputted, and when 2 input signals are turned on, the signal C0 is outputted by controlling the TRs in the same way, and when all the input signals are turned on, the signals S, C0 are outputted. In this way, the circuit can be simplified.
申请公布号 JPS58114237(A) 申请公布日期 1983.07.07
申请号 JP19810212885 申请日期 1981.12.28
申请人 MATSUSHITA DENKI SANGYO KK 发明人 MORI TOSHIKI;YAMADA HARUYASU;HASEGAWA KENICHI;SHIBATA ATSUSHI;AONO KUNITOSHI
分类号 G06F7/501;G06F7/50;H03K19/0175 主分类号 G06F7/501
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