发明名称 DMA CONTROLLING SYSTEM
摘要 PURPOSE:To avoid the trouble to set an address for each block, by recognizing the data of plural blocks of a data memory which is formed into blocks as a block of a designated address of another data memory formed into blocks. CONSTITUTION:The address groups which are transferred in order of the data memories which are formed into blocks are set by a microprocessor to a setting circuit 10 for block address group. The initial value is given to the circuit 10, and the initial address to be first transferred is set to a DMAC register 12 via a multiplexer (MPX) 11. At the same time, the number of blocks to be transferred is set via an MPX16 after the application of the initial value. Then the word component (2) is added by an adder 14 via a count-up register 13 and then returned to the MPX11, and then the address of the next word component is transferred through a DMA register 12. This procedure is repeated to complete one block.
申请公布号 JPS58112124(A) 申请公布日期 1983.07.04
申请号 JP19810211774 申请日期 1981.12.25
申请人 FUJITSU KK 发明人 AIZAWA RIYOUICHI;KUBOTA SHINICHI;SATOU AKIRA;OKA YASUKATSU
分类号 G06F13/28 主分类号 G06F13/28
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