发明名称 LOGICAL CIRCUIT
摘要 PURPOSE:To reduce the number of transistors (TRs) and wirings, and to simplify the circuit, by providing a specific input signal to both ends of switches in series connection in integrated logical circuits, opening one of the switches and determining the output. CONSTITUTION:Input signals of 3-bit A, B and C, 8-bit outputs O1-O8 are given, n-channel MOSFETs are used for TRs S1-S8 of switch configuration. With the signals A, B and C at 0, 1, 1, the switch S4 is turned off with a gate G4 and an inverter I4, and the other switches are turned on. The ground level GND, a logical level ''0'' and a VDD applied to the lowermost point correspond to logical level ''1''. Thus, the values of the outputs O1-O8 represent a specified truth table.
申请公布号 JPS58111437(A) 申请公布日期 1983.07.02
申请号 JP19810215652 申请日期 1981.12.24
申请人 NIPPON DENKI KK 发明人 KIMOTO MANABU
分类号 H03K19/173 主分类号 H03K19/173
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