| 摘要 |
PURPOSE:To remove errors at holding time by connecting the gates of two MOSTs of which sources and drains are connected respectively to make an analog switch and driving the source and drain of one MOST out of said MOSTs at an opposite phase against the gate of the 3rd MOST. CONSTITUTION:The 1st MOST22 and the 2nd MOST21 of which source and drain electrodes are connected respectively are connected each other at their gate electrodes to constitute an analog switch. The source or drain electrode of the 3rd MOST4 is connected to the source and drain electrode of the 1st MOST22. The source and drain electrode 11 of the 2nd MOST21 is driven at an opposite phase against the gate electrode 2 of the 3rd MOST4. The drain or source electrode 1 of the 3rd MOST4 is used as an analog input terminal and the source and drain electrode of the 1st MOST 22 is used as a sample holding output terminal 3. Said configuration can obtain an analog switch to reduce errors at a holding time. |
