Frequenzvervielfacher mit Kapazitátsdiode

摘要

982,065. Frequency changing. PATELHOLD PATENTVERWERTUNGS - ELECTROHOLDING A.G. Jan. 22, 1964 [Feb. 22, 1963], No. 2759/64. Heading H2F. A frequency multiplier comprises a capacity diode 5 (whose bias is not shown) fed from an input supply G at frequency f 1 through an input circuit 1 (L1 1 , L11 1 , C 1 ) tuned to the frequency f 1 and connected to a load Ra through an output circuit 4 (L1 4 , L11 4 , C 4 ) tuned to a harmonic frequency nf 1 , say 4f 1 , and includes circuits 2 and 3. The circuit 2 (L 2 , C 2 ) forms with the circuit 1 a series tuned circuit tuned to the frequency of an unwanted or false harmonic (say 3f 1 ) providing at this frequency a minimum impedance and hence an effective short circuit for the diode. Similarly, the circuit 3 forms with the circuit 4 a series tuned circuit tuned to another unwanted harmonic (say 2f 1 ) thus providing minimum impedence for this frequency. The arrangement allows the multiplier to behave in an optimum fashion. If the multiplier were a tripler both series circuits would be tuned to 2f 1 . As shown, the circuits 2 and 3 are parallel L.C. circuits tuned to the output and input frequencies respectively. In modifications (Figs. 4, 6 and 7, not shown), the circuits 2 and 3 are replaced by inductances, an inductance and capacitance and series L.C. circuits respectively. In a further modification, Fig. 8, an intermediate circuit transformer is provided which comprises a circuit L 4 , C 4 tuned to the output frequency nf 1 , a primary coupling winding L 3 and a secondary coupling winding L 5 . Seen from the diode the circuit forms a series resonant circuit at the unwanted frequency 2f 1 , this circuit being formed by the capacitance of L 1 , C 1 and the inductance L 3 . Fig. 9 (not shown) discloses a rearrangement with a series capacity diode, and Fig. 10 (not shown) discloses two circuits as in Fig. 1 connected together to give an output of n2f 1 .