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发明名称
CIRCUIT FOR TESTING LOGIC CIRCUITS
摘要
申请公布号
YU166581(A)
申请公布日期
1983.06.30
申请号
YU19810001665
申请日期
1981.07.06
申请人
GANTAR JANEZ
发明人
GANTAR JANEZ;GANTAR JANEZ
分类号
G01R31/28;H03K19/08;(IPC1-7):H03K19/08
主分类号
G01R31/28
代理机构
代理人
主权项
地址
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