发明名称 PEAK CLIPPING CIRCUIT
摘要 PURPOSE:To process a high frequency signal adequately, by improving output nonlinearity and giving a buffer effect to a peak clipping circuit suitable for a white signal clipping circuit, etc., used for the processing of a white signal of a video signal of a television receiver and a video tape recorder. CONSTITUTION:The common load resistance 64 of differential amplifiers 30 and 32 is connected to the transistors (TR) 36 and 40 of both differential amplifiers 30 and 32, and a peak clip output appearing at the resistance 64 is led out from an output terminal 68 through a buffer circuit 66 and all fed back as inverted phase inputs to the differential amplifiers 30 and 32 through a feedback circuit 70. For this purpose, the differential amplifier 30 functions as a buffer circuit having a gain 1 and resistances 54 and 56 connected to the emitter for preventing oscillation are set to adequate values to decrease its gain. The diffeential amplifier 32 functions as a comparator by setting its closed loop gain large. Thus, a clip level is set easily and nonlinearity of a base-emitter voltage is improved.
申请公布号 JPS58108814(A) 申请公布日期 1983.06.29
申请号 JP19810208896 申请日期 1981.12.23
申请人 ROOMU KK 发明人 IZAWA KAORU;ISHIDA MASAHARU
分类号 H03G11/00 主分类号 H03G11/00
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