| 摘要 |
PURPOSE:To eliminate data transfer executed each time and to reduce the test time, by transferring a measuring data in advance to plural memories provided between a sequence processor and a DA converter, and controlling the address of a memory. CONSTITUTION:A measuring data from a sequence processor 1 is converted into a measuring signal at a DA converter 3 and this measuring signal is applied to an object to be measured 4. In such a test system, a plurality of memories 5A-5C are provided between the processor 1 and the converter 3. The measuring data of the processor 1 is transferred to the memories 5A-5C in advance via an interface 6. Thus, only the address of the memories 5A-5C is controlled from an address control circuit 7 in the execution and the time for data transfer done each time in conventional systems is eliminated, allowing to reduce the test time. |
