| 摘要 |
PURPOSE:To decrease execution time and to improve efficiency, by outputting a repetitive instruction signal when a counting signal of a counter counting down with the final instruction of a repetitive processing sequence is not zero. CONSTITUTION:A program counter PC designates a readout address (a) of a program memory MEM. First, the number of repetitions is set at a counter DEC and a repetitive address instructing the first instruction of the repetitive processing sequence is set to a repetitive address register BAR. Then, in executing the repetitive processing sequence, a count signal C stored in the counter DEC is counted by -1 with the final instruction of the repetitive processing sequence. Since a repetitive address (b) of the register BAR is transferred to the counter PC if the result of count is not zero in the discrimination circuit Z, a repetitive instruction signal (d) is outputted to a control circuit CNTL and the repetitive processing sequence is executed again. |
