| 摘要 |
PURPOSE:To narrow the width of a channel step frequency and to attain tuning, by making it possible to change frequency division ratios of reference frequency and local oscillators and inputting frequency-divided outputs of both oscillators to a phase comparator of a PLL circuit and comparing phases of them with each other. CONSTITUTION:The output of a reference oscillator 9 is inputted to a reference frequency divider 21 which can divide the frequency to an optional value, and the output of a local oscillator 5 is inputted to a programmable frequency divider 7 through a prescaler 6. Outputs of frequency dividers 21 and 7 are compared with each other in phase by a phase comparator 8, and the comparison output controls the oscillator 5 through an LPF10 of constitute a PLL circuit. Frequency division ratios of frequecy dividers 21 and 7 are determined optionally by frequency division information of binary counters 22 and 23 controlled by signals from a control signal generating circuit 24. In the AFC operation, the frequency division ratio of the frequency divider 21 is controlled to raise the reference frequency, and a channel step frequency is widened, and thus, quick tuning is performed with a high S/N; and in the fine adjustment, the reference frequency is lowered to narrow the channel step frequency, and thus, complete tuning is performed. |
