发明名称 ENCODING METHOD
摘要 PURPOSE:To simplify the hardware constitution and to attain efficient use of the hardware, by modifying a check matrix of a BCH code in a prescribed form the producing a parity code. CONSTITUTION:As an example. inut data Wi is taken as W1-W8 and a parity code Pj is taken as P1-P4. Values expressed in equations are obtained at shift registers 4-7. Constants required for the calculation of the parity code P1 are outputted from ROMs and multiplication is done at multipliers 12-14. The P1 is outputted through a modulo adder 16. A switch S5 selects a feedback loop at the output of the P1 and the P1 is given to the shift register 7. Through similar operation, the production of all the parity codes of the P1-P4 is finished. Since the check matrix for a BCH code is modified into a from for ease of execution, the hardware can be simplified.
申请公布号 JPS58104529(A) 申请公布日期 1983.06.22
申请号 JP19810204409 申请日期 1981.12.16
申请人 MATSUSHITA DENKI SANGYO KK 发明人 KAMEDA KEIICHI;SENOO TAKANORI
分类号 G06F11/10;H03M13/00;H03M13/15 主分类号 G06F11/10
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